M.Tech in VLSI Design (Executive)

The program is called the Executive Post Graduate Certification in AI-Enabled VLSI Design and it is offered by the Indian Institute of Technology Kharagpur (IIT Kharagpur).

The program duration is approximately 8 months, with the next cohort tentatively scheduled to begin in June 2026.

Criteria:
1. B.Tech/M.Tech or B.E/M.E (final-year students or graduates).
2. Acceptable disciplines include Electronics, ECE, Electrical Engineering, VLSI, Instrumentation, Computer Science, and IT.
3. M.Sc. in Electronics, Physics, or Semiconductor Technology, or MCA is also accepted.
4. Minimum 50% aggregate marks or equivalent CGPA from a recognized university.
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Ideal Candidates:1. 4th-year engineering students interested in VLSI design.
2. Fresh graduates looking to start a career in semiconductor and chip design.
3. Working professionals seeking to transition into VLSI roles.
4. Candidates from other engineering backgrounds with exposure to digital electronics, HDL, embedded systems, or semiconductor fundamentals.

Applicants can apply online by completing the application form and submitting their personal, educational, and professional details along with the required documents.

The application process has already begun, and candidates can apply while seats are still available.

Yes. The selection process involves submitting an application, a profile review by the technical committee, and a pre-screening test to assess subject knowledge before receiving the final offer letter.

Applicants must submit documents such as Aadhar Card, date of birth proof, resume, graduation marksheets and degree certificates, 12th marksheet, and work experience documents if applicable.

Yes. A pre-screening test evaluates candidates’ understanding of digital electronics, analog electronics, logical reasoning, and Verilog fundamentals.

Basic knowledge of Verilog coding is recommended to perform well in the pre-screening test and to start the program smoothly.

The program is delivered through 100% live online classes conducted by IIT Kharagpur faculty and industry experts.

Yes. Participants who choose to attend the optional campus immersion will need to pay approximately ₹10,000 closer to the immersion dates.

Yes. Accommodation booking can be facilitated for outstation candidates during the campus immersion, subject to availability.

The program integrates industry-grade Cadence tools, the Vivado FPGA workflow, and a complete RTL-to-GDSII design flow enhanced with AI-driven PPA optimization and low-power design techniques.

The program is led by Prof. Mrigank Sharad, whose expertise in nanoelectronics, VLSI design, and digital and mixed-signal systems contributes to developing energy-efficient AI hardware and modern semiconductor technologies.

Established in 1951 as India’s first IIT, IIT Kharagpur has a strong legacy in engineering education and advanced semiconductor research, combining academic rigor with industry-relevant curriculum design.

Industry practices and modern semiconductor workflows are integrated into the curriculum, ensuring that learners gain exposure to real-world design methodologies and AI-enabled chip design practices.

The curriculum covers digital design foundations, Verilog-based RTL development, FPGA workflows, ASIC implementation, low-power design, and the complete RTL-to-GDSII design lifecycle including timing analysis and physical design.

Participants gain hands-on experience with tools such as Vivado IDE and Cadence tools including Xcelium, Genus, Innovus, Tempus, and Voltus. The program also includes Verilog programming and basic TCL scripting.

The program integrates AI-driven workflows including machine-learning-based design space exploration, predictive static timing analysis, and AI-guided optimization of power, performance, and area metrics.

The program offers full-stack exposure from RTL design to GDSII implementation using commercial-grade semiconductor toolchains and AI-enabled automation workflows.

Through modular learning and customizable capstone projects, participants can focus on areas aligned with their interests within semiconductor design.

Participants work on projects such as hardware-accelerated audio signal processing with neural network classifiers, Tiny-YOLO based object detection accelerators, and optical flow estimation accelerators for automated vehicles.

Graduates can pursue roles such as RTL Design Engineer, FPGA Design Engineer, ASIC Implementation Engineer, Physical Design Engineer, Low-Power Design Specialist, and AI-EDA Integration Specialist.

AI-integrated EDA skills are highly valued in the semiconductor industry and open access to specialized roles with higher compensation potential.

The program equips learners with both traditional VLSI methodologies and emerging AI-driven automation skills, preparing them for the evolving semiconductor ecosystem.

Upon successful completion, participants receive the Executive Post Graduate Certification in AI-Enabled VLSI Design from IIT Kharagpur.

The program fee is ₹1,25,000 plus 18% GST. Financing options are available through partner financial institutions.

A non-refundable application deposit of ₹5,000 must be paid during application submission and is adjusted in the final fee. The remaining fee must be paid within five days of receiving the offer letter.

Yes. Participants can self-fund the program either fully or partially through personal or family resources.

Yes. Futurense partners with financial institutions to help eligible participants access loan options.

Interest rates vary depending on the financial partner and repayment plan and are generally competitive in the current lending market.

Applicants should keep their:
1. PAN card.
2. Aadhaar card.
3. Bank statements for the last three months (required for financing or loan processing).